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lt1498/lt1499 14989fg 1 typical application description 10mhz, 6v/s, dual/quad rail-to-rail input and output precision c-load op amps the lt ? 1498/lt1499 are dual/quad, rail-to-rail input and output precision c-load? op amps with a 10mhz gain- bandwidth product and a 6v/s slew rate. the lt1498/lt1499 are designed to maximize input dynamic range by delivering precision performance over the full supply voltage. using a patented technique, both input stages of the lt1498/lt1499 are trimmed, one at the negative supply and the other at the positive supply. the resulting guaranteed common mode rejection is much better than other rail-to-rail input op amps. when used as a unity-gain buffer in front of single supply 12-bit a-to-d converters, the lt1498/lt1499 are guaranteed to add less than 1lsb of error even in single 3v supply systems. with 110db of supply rejection, the lt1498/lt1499 main- tain their performance over a supply range of 2.2v to 36v and are speci? ed for 3v, 5v and 15v supplies. the inputs can be driven beyond the supplies without damage or phase reversal of the output. these op amps remain stable while driving capacitive loads up to 10,000pf. the lt1498 is available with the standard dual op amp con? guration in 8-pin pdip and so packaging. the lt1499 features the standard quad op amp con? guration and is available in a 14-pin plastic so package. these devices can be used as plug-in replacements for many standard op amps to improve input/output range and precision. l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks and c-load is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. features applications n rail-to-rail input and output n 475v max v os from v + to v C n gain-bandwidth product: 10mhz n slew rate: 6v/s n low supply current per ampli? er: 1.7ma n input offset current: 65na max n input bias current: 650na max n open-loop gain: 1000v/mv min n low input noise voltage: 12nv/ hz typ n wide supply range: 2.2v to 15v n large output drive current: 30ma n stable for capacitive loads up to 10,000pf n dual in 8-pin pdip and so package n quad in narrow 14-pin so n driving a-to-d converters n active filters n rail-to-rail buffer ampli? ers n low voltage signal processing n battery-powered systems frequency response single supply 100khz 4th order butterworth filter C + 1/2 lt1498 6.81k v in v + /2 v + v out 1498 ta01 330pf 11.3k 6.81k C + 1/2 lt1498 5.23k 47pf 1000pf 10.2k 5.23k 100pf frequency (hz) 100 gain (db) C50 C30 C10 10 1m 1498 ta02 C70 C90 C60 C40 C20 0 C80 C100 C110 1k 10k 100k 10m v in = 2.7v p-p v + = 3v
lt1498/lt1499 14989fg 2 absolute maximum ratings total supply voltage (v + to v C ) .................................36v input current ........................................................ 10ma output short-circuit duration (note 2) ......... continuous operating temperature range lt1498/lt1499 ....................................C40c to 85c lt1498h/lt1499h ............................. C40c to 125c lt1498mp ......................................... C55c to 125c (note 1) pin configuration order information speci? ed temperature range (note 4) lt1498/lt1499 ....................................C40c to 85c lt1498h/lt1499h ............................. C40c to 125c lt1498mp ......................................... C55c to 125c junction temperature ........................................... 150c storage temperature range .................. C65c to 150c lead temperature (soldering, 10 sec)................... 300c 1 2 3 4 8 7 6 5 top view out a Cin a +in a v C v + out b Cin b +in b n8 package 8-lead plastic dip a b t jmax = 150c, ja = 130c/w 1 2 3 4 8 7 6 5 top view v + out b Cin b +in b out a Cin a +in a v C s8 package 8-lead plastic so a b t jmax = 150c, ja = 130c/w top view s package 14-lead plastic so 1 2 3 4 5 6 7 14 13 12 11 10 8 8 outa Cin a +in a v + +in b Cin b out b out d Cin d +in d v C +in c Cin c out c a d b c t jmax = 150c, ja = 150c/w lead free finish tape and reel part marking* package description specified temperature range lt1498cn8#pbf lt1498cn8#trpbf lt1498cn8 8-lead plastic pdip 0c to 70c lt1498cs8#pbf lt1498cs8#trpbf 1498 8-lead plastic so 0c to 70c lt1498in8#pbf lt1498in8#trpbf lt1498in8 8-lead plastic pdip C40c to 85c lt1498is8#pbf lt1498is8#trpbf 1498i 8-lead plastic so C40c to 85c lt1498hs8#pbf lt1498hs8#trpbf 1498h 8-lead plastic so C40c to 125c lt1498mps8#pbf lt1498mps8#trpbf 1498mp 8-lead plastic so C55c to 125c lt1499cs#pbf lt1499cs#trpbf lt1499cs 14-lead plastic so 0c to 70c lt1499is#pbf lt1499is#trpbf lt1499is 14-lead plastic so C40c to 85c lt1499hs#pbf lt1499hs#trpbf lt1499hs 14-lead plastic so C40c to 125c consult ltc marketing for parts speci? ed with wider operating temperature ranges. *the temperature grade is identi? ed by a label on the shipping container. consult ltc marketing for information on non-standard lead based ? nish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/
lt1498/lt1499 14989fg 3 electrical characteristics t a = 25c, v s = 5v, 0v; v s = 3v, 0v; v cm = v out = half supply, unless otherwise noted. symbol parameter conditions min typ max units v os input offset voltage v cm = v + v cm = v C 150 150 475 475 v v v os input offset voltage shift v cm = v C to v + 150 425 v input offset voltage match (channel-to-channel) v cm = v + , v C (note 5) 200 750 v i b input bias current v cm = v + v cm = v C 0 C650 250 C250 650 0 na na i b input bias current shift v cm = v C to v + 500 1300 na input bias current match (channel-to-channel) v cm = v + (note 5) v cm = v C (note 5) 0 C100 10 C10 100 0 na na i os input offset current v cm = v + v cm = v C 5 5 65 65 na na i os input offset current shift v cm = v C to v + 10 130 na input noise voltage 0.1hz to 10hz 400 nv p-p e n input noise voltage density f = 1khz 12 nv/ hz i n input noise current density f = 1khz 0.3 pa/ hz c in input capacitance 5pf a vol large-signal voltage gain v s = 5v, v o = 75mv to 4.8v, r l = 10k v s = 3v, v o = 75mv to 2.8v, r l = 10k 600 500 3800 2000 v/mv v/mv cmrr common mode rejection ratio v s = 5v, v cm = v C to v + v s = 3v, v cm = v C to v + 81 76 90 86 db db cmrr match (channel-to-channel) (note 5) v s = 5v, v cm = v C to v + v s = 3v, v cm = v C to v + 75 70 91 86 db db psrr power supply rejection ratio v s = 2.2v to 12v, v cm = v o = 0.5v 88 105 db psrr match (channel-to-channel) (note 5) v s = 2.2v to 12v, v cm = v o = 0.5v 82 103 db v ol output voltage swing (low) (note 6) no load i sink = 0.5ma i sink = 2.5ma 14 35 90 30 70 200 mv mv mv v oh output voltage swing (high) (note 6) no load i source = 0.5ma i source = 2.5ma 2.5 50 140 10 100 250 mv mv mv i sc short-circuit current v s = 5v v s = 3v 12.5 12.0 24 19 ma ma i s supply current per ampli? er 1.7 2.2 ma gbw gain-bandwidth product (note 7) 6.8 10.5 mhz sr slew rate (note 8) v s = 5v, a v = C1, r l = open, v o = 4v v s = 3v, a v = C1, r l = open 2.6 2.3 4.5 4.0 v/s v/s
lt1498/lt1499 14989fg 4 electrical characteristics the l denotes the speci? cations which apply over the temperature range 0c < t a < 70c. v s = 5v, 0v; v s = 3v, 0v; v cm = v out = half supply, unless otherwise noted. symbol parameter conditions min typ max units v os input offset voltage v cm = v + v cm = v C + 0.1v l l 175 175 650 650 v v v os tc input offset voltage drift (note 3) v cm = v + l l 0.5 1.5 2.5 4.0 v/c v/c v os input offset voltage shift v cm = v C + 0.1v to v + l 170 600 v input offset voltage match (channel-to-channel) v cm = v C + 0.1v, v + (note 5) l 200 900 v i b input bias current v cm = v + v cm = v C + 0.1v l l 0 C780 275 C275 780 0 na na i b input bias current shift v cm = v C + 0.1v to v + l 550 1560 na input bias current match (channel-to-channel) v cm = v + (note 5) v cm = v C + 0.1v (note 5) l l 0 C170 15 C15 170 0 na na i os input offset current v cm = v + v cm = v C + 0.1v l l 10 10 85 85 na na i os input offset current shift v cm = v C + 0.1v to v + l 20 170 na a vol large-signal voltage gain v s = 5v, v o = 75mv to 4.8v, r l = 10k v s = 3v, v o = 75mv to 2.8v, r l = 10k l l 500 400 2500 2000 v/mv v/mv cmrr common mode rejection ratio v s = 5v, v cm = v C + 0.1v to v + v s = 3v, v cm = v C + 0.1v to v + l l 78 73 89 85 db db cmrr match (channel-to-channel) (note 5) v s = 5v, v cm = v C + 0.1v to v + v s = 3v, v cm = v C + 0.1v to v + l l 74 69 90 86 db db psrr power supply rejection ratio v s = 2.3v to 12v, v cm = v o = 0.5v l 86 102 db psrr match (channel-to-channel) (note 5) v s = 2.3v to 12v, v cm = v o = 0.5v l 80 102 db v ol output voltage swing (low) (note 6) no load i sink = 0.5ma i sink = 2.5ma l l l 17 40 110 35 80 220 mv mv mv v oh output voltage swing (high) (note 6) no load i source = 0.5ma i source = 2.5ma l l l 3.5 55 160 15 120 300 mv mv mv i sc short-circuit current v s = 5v v s = 3v l l 12 10 23 20 ma ma i s supply current per ampli? er l 1.9 2.6 ma gbw gain-bandwidth product (note 7) l 6.1 9 mhz sr slew rate (note 8) v s = 5v, a v = C1, r l = open, v o = 4v v s = 3v, a v = C1, r l = open l l 2.5 2.2 4.0 3.5 v/s v/s
lt1498/lt1499 14989fg 5 electrical characteristics the l denotes the speci? cations which apply over the temperature range C40c < t a < 85c. v s = 5v, 0v; v s = 3v, 0v; v cm = v out = half supply, unless otherwise noted. (note 4) symbol parameter conditions min typ max units v os input offset voltage v cm = v + v cm = v C + 0.1v l l 250 250 750 750 v v v os tc input offset voltage drift (note 3) v cm = v + l l 0.5 1.5 2.5 4.0 v/c v/c v os input offset voltage shift v cm = v C + 0.1v to v + l 250 650 v input offset voltage match (channel-to-channel) v cm = v C + 0.1v, v + (note 5) l 300 1500 v i b input bias current v cm = v + v cm = v C + 0.1v l l 0 C975 350 C350 975 0 na na i b input bias current shift v cm = v C + 0.1v to v + l 700 1950 na input bias current match (channel-to-channel) v cm = v + (note 5) v cm = v C + 0.1v (note 5) l l 0 C180 30 C30 180 0 na na i os input offset current v cm = v + v cm = v C + 0.1v l l 15 15 110 110 na na i os input offset current shift v cm = v C + 0.1v to v + l 30 220 na a vol large-signal voltage gain v s = 5v, v o = 75mv to 4.8v, r l = 10k v s = 3v, v o = 75mv to 2.8v, r l = 10k l l 400 300 2500 2000 v/mv v/mv cmrr common mode rejection ratio v s = 5v, v cm = v C + 0.1v to v + v s = 3v, v cm = v C + 0.1v to v + l l 77 73 86 81 db db cmrr match (channel-to-channel) (note 5) v s = 5v, v cm = v C + 0.1v to v + v s = 3v, v cm = v C + 0.1v to v + l l 72 69 86 83 db db psrr power supply rejection ratio v s = 2.5v to 12v, v cm = v o = 0.5v l 86 100 db psrr match (channel-to-channel) (note 5) v s = 2.5v to 12v, v cm = v o = 0.5v l 80 100 db v ol output voltage swing (low) (note 6) no load i sink = 0.5ma i sink = 2.5ma l l l 18 45 110 40 80 220 mv mv mv v oh output voltage swing (high) (note 6) no load i source = 0.5ma i source = 2.5ma l l l 3.5 60 170 15 120 300 mv mv mv i sc short-circuit current v s = 5v v s = 3v l l 7.5 7.5 15 15 ma ma i s supply current per ampli? er l 2.0 2.7 ma gbw gain-bandwidth product (note 7) l 5.8 8.5 mhz sr slew rate (note 8) v s = 5v, a v = C1, r l = open, v o = 4v v s = 3v, a v = C1, r l = open l l 2.2 1.9 3.6 3.2 v/s v/s
lt1498/lt1499 14989fg 6 symbol parameter conditions min typ max units v os input offset voltage v cm = v + C 0.5v v cm = v C + 0.5v l l 300 300 1100 1100 v v v os tc input offset voltage drift (note 3) v cm = v + C 0.5v l l 0.5 1.5 v/c v/c v os input offset voltage shift v cm = v C + 0.5v to v + C 0.5v l 250 2300 v input offset voltage match (channel-to-channel) v cm = v C + 0.5v, v + C 0.5v (note 5) l 300 1900 v i b input bias current v cm = v + C 0.5v v cm = v C + 0.5v l l 0 C1100 450 C450 1100 0 na na i b input bias current shift v cm = v C + 0.5v to v + C 0.5v l 900 2200 na input bias current match (channel-to-channel) v cm = v + C 0.5v (note 5) v cm = v C + 0.5v (note 5) l l 0 C400 40 C40 400 0 na na i os input offset current v cm = v + C 0.5v v cm = v C + 0.5v l l 40 40 300 300 na na i os input offset current shift v cm = v C + 0.5v to v + C 0.5v l 80 600 na a vol large-signal voltage gain v s = 5v, v o = 0.5v to 4.5v, r l = 10k v s = 3v, v o = 0.5v to 2.5v, r l = 10k l l 40 20 210 210 v/mv v/mv cmrr common mode rejection ratio v s = 5v, v cm = v C + 0.5v to v + C 0.5v v s = 3v, v cm = v C + 0.5v to v + C 0.5v l l 66 62 80 75 db db cmrr match (channel-to-channel) (note 5) v s = 5v, v cm = v C + 0.5v to v + C 0.5v v s = 3v, v cm = v C + 0.5v to v + C 0.5v l l 62 58 80 75 db db psrr power supply rejection ratio v s = 2.5v to 12v, v cm = v o = 0.5v l 86 100 db psrr match (channel-to-channel) (note 5) v s = 2.5v to 12v, v cm = v o = 0.5v l 80 100 db v ol output voltage swing (low) (note 6) no load i sink = 0.5ma i sink = 2.5ma l l l 22 45 110 50 80 220 mv mv mv v oh output voltage swing (high) (note 6) no load i source = 0.5ma i source = 2.5ma l l l 3.5 60 170 20 120 350 mv mv mv i sc short-circuit current v s = 5v v s = 3v l l 5 5 15 15 ma ma i s supply current per ampli? er l 2.4 3.0 ma gbw gain-bandwidth product (note 7) l 5.8 8.5 mhz sr slew rate (note 8) v s = 5v, a v = C1, r l = open, v o = 4v v s = 3v, a v = C1, r l = open l l 2.0 1.7 3.6 3.2 v/s v/s electrical characteristics the l denotes the speci? cations which apply over the temperature range C40c < t a < 125c. v s = 5v, 0v; v s = 3v, 0v; v cm = v out = half supply, unless otherwise noted. (note 4)
lt1498/lt1499 14989fg 7 electrical characteristics the l denotes the speci? cations which apply over the temperature range C55c < t a < 125c. v s = 5v, 0v; v s = 3v, 0v; v cm = v out = half supply, unless otherwise noted. (note 4) symbol parameter conditions min typ max units v os input offset voltage v cm = v + C 0.5v v cm = v C + 0.5v l l 300 300 1100 1100 v v v os tc input offset voltage drift (note 3) v cm = v + C 0.5v l l 0.5 1.5 v/c v/c v os input offset voltage shift v cm = v C + 0.5v to v + C 0.5v l 250 2300 v input offset voltage match (channel-to-channel) v cm = v C + 0.5v, v + C 0.5v (note 5) l 300 1900 v i b input bias current v cm = v + C 0.5v v cm = v C + 0.5v l l 0 C1100 450 C450 1100 0 na na i b input bias current shift v cm = v C + 0.5v to v + C 0.5v l 900 2200 na input bias current match (channel-to-channel) v cm = v + C 0.5v (note 5) v cm = v C + 0.5v (note 5) l l 0 C400 40 C40 400 0 na na i os input offset current v cm = v + C 0.5v v cm = v C + 0.5v l l 40 40 300 300 na na i os input offset current shift v cm = v C + 0.5v to v + C 0.5v l 80 600 na a vol large-signal voltage gain v s = 5v, v o = 0.5v to 4.5v, r l = 10k v s = 3v, v o = 0.5v to 2.5v, r l = 10k l l 40 20 210 210 v/mv v/mv cmrr common mode rejection ratio v s = 5v, v cm = v C + 0.5v to v + C 0.5v v s = 3v, v cm = v C + 0.5v to v + C 0.5v l l 66 62 80 75 db db cmrr match (channel-to-channel) (note 5) v s = 5v, v cm = v C + 0.5v to v + C 0.5v v s = 3v, v cm = v C + 0.5v to v + C 0.5v l l 62 58 80 75 db db psrr power supply rejection ratio v s = 2.5v to 12v, v cm = v o = 0.5v l 86 100 db psrr match (channel-to-channel) (note 5) v s = 2.5v to 12v, v cm = v o = 0.5v l 80 100 db v ol output voltage swing (low) (note 6) no load i sink = 0.5ma i sink = 2.5ma l l l 22 45 110 50 80 220 mv mv mv v oh output voltage swing (high) (note 6) no load i source = 0.5ma i source = 2.5ma l l l 3.5 60 170 20 120 350 mv mv mv i sc short-circuit current v s = 5v v s = 3v l l 5 5 15 15 ma ma i s supply current per ampli? er l 2.4 3.0 ma gbw gain-bandwidth product (note 7) l 5.8 8.5 mhz sr slew rate (note 8) v s = 5v, a v = C1, r l = open, v o = 4v v s = 3v, a v = C1, r l = open l l 2.0 1.7 3.6 3.2 v/s v/s
lt1498/lt1499 14989fg 8 symbol parameter conditions min typ max units v os input offset voltage v cm = v + v cm = v C 200 200 800 800 v v v os input offset voltage shift v cm = v C to v + 150 650 v input offset voltage match (channel-to-channel) v cm = v + , v C (note 5) 250 1400 v i b input bias current v cm = v + v cm = v C 0 C715 250 C250 715 0 na na i b input bias current shift v cm = v C to v + 500 1430 na input bias current match (channel-to-channel) v cm = v + (note 5) v cm = v C (note 5) 0 C120 12 C12 120 0 na na i os input offset current v cm = v + v cm = v C 6 6 70 70 na na i os input offset current shift v cm = v C to v + 12 140 na input noise voltage 0.1hz to 10hz 400 nv p-p e n input noise voltage density f = 1khz 12 nv/ hz i n input noise current density f = 1khz 0.3 pa/ hz a vol large-signal voltage gain v o = C14.5v to 14.5v, r l = 10k v o = C10v to 10v, r l = 2k 1000 500 5200 2300 v/mv v/mv channel separation v o = C10v to 10v, r l = 2k 116 130 db cmrr common mode rejection ratio v cm = v C to v + 93 106 db cmrr match (channel-to-channel) (note 5) v cm = v C to v + 87 103 db psrr power supply rejection ratio v s = 5v to 15v 89 110 db psrr match (channel-to-channel) (note 5) v s = 5v to 15v 83 105 db v ol output voltage swing (low) (note 6) no load i sink = 0.5ma i sink = 10ma 18 40 230 30 80 500 mv mv mv v oh output voltage swing (high) (note 6) no load i source = 0.5ma i source = 10ma 2.5 55 420 10 120 800 mv mv mv i sc short-circuit current 15 30 ma i s supply current per ampli? er 1.8 2.5 ma gbw gain-bandwidth product (note 7) 6.8 10.5 mhz sr slew rate a v = C1, r l = open, v o = 10v measure at v o = 5v 3.5 6 v/s t a = 25c. v s = 15v, v cm = 0v, v out = 0v, unless otherwise noted. electrical characteristics
lt1498/lt1499 14989fg 9 electrical characteristics the l denotes the speci? cations which apply over the temperature range 0c < t a < 70c. v s = 15v, v cm = 0v, v out = 0v, unless otherwise noted. symbol parameter conditions min typ max units v os input offset voltage v cm = v + v cm = v C + 0.1v l l 200 200 900 900 v v v os tc input offset voltage drift (note 3) v cm = v + l l 1.0 2.0 3.5 5.0 v/c v/c v os input offset voltage shift v cm = v C + 0.1v to v + l 200 750 v input offset voltage match (channel-to-channel) v cm = v C + 0.1v, v + (note 5) l 350 1500 v i b input bias current v cm = v + v cm = v C + 0.1v l l 0 C875 300 C300 875 0 na na i b input bias current shift v cm = v C + 0.1v to v + l 600 1750 na input bias current match (channel-to-channel) v cm = v + (note 5) v cm = v C + 0.1v (note 5) l l 0 C180 20 C20 180 0 na na i os input offset current v cm = v + v cm = v C + 0.1v l l 15 15 90 90 na na i os input offset current shift v cm = v C + 0.1v to v + l 30 180 na a vol large-signal voltage gain v o = C14.5v to 14.5v, r l = 10k v o = C10v to 10v, r l = 2k l l 900 400 5000 2000 v/mv v/mv channel separation v o = C10v to 10v, r l = 2k l 112 125 db cmrr common mode rejection ratio v cm = v C + 0.1v to v + l 92 103 db cmrr match (channel-to-channel) (note 5) v cm = v C + 0.1v to v + l 86 103 db psrr power supply rejection ratio v s = 5v to 15v l 88 103 db psrr match (channel-to-channel) (note 5) v s = 5v to 15v l 82 103 db v ol output voltage swing (low) (note 6) no load i sink = 0.5ma i sink = 10ma l l l 18 45 270 40 90 520 mv mv mv v oh output voltage swing (high) (note 6) no load i source = 0.5ma i source = 10ma l l l 3.5 60 480 15 120 1000 mv mv mv i sc short-circuit current l 12 28 ma i s supply current per ampli? er l 1.9 2.8 ma gbw gain-bandwidth product (note 7) l 6.1 9 mhz sr slew rate a v = C1, r l = open, v o = 10v measured at v o = 5v l 3.4 5.3 v/s
lt1498/lt1499 14989fg 10 electrical characteristics the l denotes the speci? cations which apply over the temperature range C40c < t a < 85c. v s = 15v, v cm = 0v, v out = 0v, unless otherwise noted. (note 4) symbol parameter conditions min typ max units v os input offset voltage v cm = v + v cm = v C + 0.1v l l 300 300 950 950 v v v os tc input offset voltage drift (note 3) v cm = v + l l 1.0 2.0 3.5 5.0 v/c v/c v os input offset voltage shift v cm = v C + 0.1v to v + l 250 850 v input offset voltage match (channel-to-channel) v cm = v C + 0.1v, v + (note 5) l 350 1800 v i b input bias current v cm = v + v cm = v C + 0.1v l l 0 C1050 350 C350 1050 0 na na i b input bias current shift v cm = v C + 0.1v to v + l 700 2100 na input bias current match (channel-to-channel) v cm = v + (note 5) v cm = v C + 0.1v (note 5) l l 0 C200 20 C20 200 0 na na i os input offset current v cm = v + v cm = v C + 0.1v l l 15 15 115 115 na na i os input offset current shift v cm = v C + 0.1v to v + l 30 230 na a vol large-signal voltage gain v o = C14.5v to 14.5v, r l = 10k v o = C10v to 10v, r l = 2k l l 800 350 5000 2000 v/mv v/mv channel separation v o = C10v to 10v, r l = 2k l 110 120 db cmrr common mode rejection ratio v cm = v C + 0.1v to v + l 90 101 db cmrr match (channel-to-channel) (note 5) v cm = v C + 0.1v to v + l 86 100 db psrr power supply rejection ratio v s = 5v to 15v l 88 100 db psrr match (channel-to-channel) (note 5) v s = 5v to 15v l 82 100 db v ol output voltage swing (low) (note 6) no load i sink = 0.5ma i sink = 10ma l l l 25 50 275 50 100 520 mv mv mv v oh output voltage swing (high) (note 6) no load i source = 0.5ma i source = 10ma l l l 3.5 65 500 15 120 1000 mv mv mv i sc short-circuit current l 10 18 ma i s supply current per ampli? er l 2.0 3.0 ma gbw gain-bandwidth product (note 7) l 5.8 8.5 mhz sr slew rate a v = C1, r l = open, v o = 10v measure at v o = 5v l 3 4.75 v/s
lt1498/lt1499 14989fg 11 symbol parameter conditions min typ max units v os input offset voltage v cm = v + C 0.5v v cm = v C + 0.5v l l 350 350 1300 1300 v v v os tc input offset voltage drift (note 3) v cm = v + C 0.5v l l 1.0 2.0 v/c v/c v os input offset voltage shift v cm = v C + 0.5v to v + C 0.5v l 250 1500 v input offset voltage match (channel-to-channel) v cm = v C + 0.5v, v + C 0.5v (note 5) l 400 2200 v i b input bias current v cm = v + C 0.5v v cm = v C + 0.5v l l 0 C1200 500 C500 1200 0 na na i b input bias current shift v cm = v C + 0.5v to v + C 0.5v l 1000 2400 na input bias current match (channel-to-channel) v cm = v + C 0.5v (note 5) v cm = v C + 0.5v (note 5) l l 0 C400 40 C40 400 0 na na i os input offset current v cm = v + C 0.5v v cm = v C + 0.5v l l 40 40 300 300 na na i os input offset current shift v cm = v C + 0.5v to v + C 0.5v l 80 600 na a vol large-signal voltage gain v o = C14.5v to 14.5v, r l = 10k l 40 400 v/mv channel separation v o = C10v to 10v, r l = 2k l 110 120 db cmrr common mode rejection ratio v cm = v C + 0.5v to v + C 0.5v l 86 100 db cmrr match (channel-to-channel) (note 5) v cm = v C + 0.5v to v + C 0.5v l 80 100 db psrr power supply rejection ratio v s = 5v to 15v l 88 100 db psrr match (channel-to-channel) (note 5) v s = 5v to 15v l 80 100 db v ol output voltage swing (low) (note 6) no load i sink = 0.5ma i sink = 10ma l l l 25 50 275 75 100 520 mv mv mv v oh output voltage swing (high) (note 6) no load i source = 0.5ma i source = 10ma l l l 3.5 65 500 20 120 1400 mv mv mv i sc short-circuit current l 7.5 12 ma i s supply current per ampli? er l 2.5 3.2 ma gbw gain-bandwidth product (note 7) l 5.8 8.5 mhz sr slew rate a v = C1, r l = open, v o = 10v measure at v o = 5v l 2.2 4.75 v/s the l denotes the speci? cations which apply over the temperature range C40c < t a < 125c. v s = 15v, v cm = 0v, v out = 0v, unless otherwise noted. (note 4) electrical characteristics
lt1498/lt1499 14989fg 12 electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: a heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted inde? nitely. note 3: this parameter is not 100% tested. note 4: the lt1498c/lt1499c are guaranteed to meet speci? ed performance from 0c to 70c. the lt1498c/lt1499c are designed, characterized and expected to meet speci? ed performance from C40c to 85c but are not tested or qa sampled at these temperatures. the lt1498i/lt1499i are guaranteed to meet speci? ed performance from C40c to 85c. the lt1498h/lt1499h are guaranteed to meet speci? ed performance from C40c to 125c. the lt1498mp is guaranteed to meet speci? ed performance from C55c to 125c. symbol parameter conditions min typ max units v os input offset voltage v cm = v + C 0.5v v cm = v C + 0.5v l l 350 350 1300 1300 v v v os tc input offset voltage drift (note 3) v cm = v + C 0.5v l l 1.0 2.0 v/c v/c v os input offset voltage shift v cm = v C + 0.5v to v + C 0.5v l 250 1500 v input offset voltage match (channel-to-channel) v cm = v C + 0.5v, v + C 0.5v (note 5) l 400 2200 v i b input bias current v cm = v + C 0.5v v cm = v C + 0.5v l l 0 C1200 500 C500 1200 0 na na i b input bias current shift v cm = v C + 0.5v to v + C 0.5v l 1000 2400 na input bias current match (channel-to-channel) v cm = v + C 0.5v (note 5) v cm = v C + 0.5v (note 5) l l 0 C400 40 C40 400 0 na na i os input offset current v cm = v + C 0.5v v cm = v C + 0.5v l l 40 40 300 300 na na i os input offset current shift v cm = v C + 0.5v to v + C 0.5v l 80 600 na a vol large-signal voltage gain v o = C14.5v to 14.5v, r l = 10k l 40 400 v/mv channel separation v o = C10v to 10v, r l = 2k l 110 120 db cmrr common mode rejection ratio v cm = v C + 0.5v to v + C 0.5v l 86 100 db cmrr match (channel-to-channel) (note 5) v cm = v C + 0.5v to v + C 0.5v l 80 100 db psrr power supply rejection ratio v s = 5v to 15v l 88 100 db psrr match (channel-to-channel) (note 5) v s = 5v to 15v l 80 100 db v ol output voltage swing (low) (note 6) no load i sink = 0.5ma i sink = 10ma l l l 25 50 275 75 100 520 mv mv mv v oh output voltage swing (high) (note 6) no load i source = 0.5ma i source = 10ma l l l 3.5 65 500 20 120 1400 mv mv mv i sc short-circuit current l 7.5 12 ma i s supply current per ampli? er l 2.5 3.2 ma gbw gain-bandwidth product (note 7) l 5.8 8.5 mhz sr slew rate a v = C1, r l = open, v o = 10v measure at v o = 5v l 2.2 4.75 v/s the l denotes the speci? cations which apply over the temperature range C55c < t a < 125c. v s = 15v, v cm = 0v, v out = 0v, unless otherwise noted. (note 4) note 5: matching parameters are the difference between ampli? ers a and d and between b and c on the lt1499; between the two ampli? ers on the lt1498. note 6: output voltage swings are measured between the output and power supply rails. note 7: v s = 3v, v s = 15v gbw limit guaranteed by correlation to 5v tests. note 8: v s = 3v, v s = 5v slew rate limit guaranteed by correlation to 15v tests.
lt1498/lt1499 14989fg 13 typical performance characteristics supply current vs supply voltage supply current vs temperature input bias current vs common mode voltage input bias current vs temperature output saturation voltage vs load current (output high) output saturation voltage vs load current (output low) v os distribution, v cm = 0v (pnp stage) v os distribution v cm = 5v (npn stage) v os shift for v cm = 0v to 5v input offset voltage (v) C500 percent of units (%) 15 20 25 300 14989 g01 10 5 0 C300 C100 100 500 lt1498: n8, s8 packages lt1499: s14 package v s = 5v, 0v v cm = 0v input offset voltage (v) C500 percent of units (%) 15 20 25 300 14989 g02 10 5 0 C300 C100 100 500 lt1498: n8, s8 packages lt1499: s14 package v s = 5v, 0v v cm = 5v input offset voltage (v) C500 percent of units (%) 15 20 25 300 14989 g03 10 5 0 C300 C100 100 500 lt1498: n8, s8 packages lt1499: s14 package v s = 5v, 0v v cm = 0v to 5v total supply voltage (v) 0 supply current per amplifier (ma) 1.0 1.5 32 14989 g04 0.5 0 8 16 24 436 12 20 28 2.0 t a = 125c t a = 25c t a = C55c temperature (c) C50 supply current per amplifier (ma) 25 14989 g05 1.0 0.5 C25 0 50 0 2.0 1.5 75 100 125 v s = p 15v v s = 5v, 0v common mode voltage (v) C2 input bias current (na) 0 200 23456 14989 g06 C200 C400 C1 0 1 400 C100 100 C300 300 v s = 5v, 0v t a = 125c t a = 25c t a = C55c temperature (c) C50 input bias current (na) 400 300 200 100 0 C100 C200 C300 C400 70 14989 g07 C20 10 40 C35 85 C5 25 55 100 v s = 5v, 0v v cm = 5v v s = 5v, 0v v cm = 0v v s = p 15v v cm = 15v v s = p 15v v cm = C15v npn active pnp active load current (ma) 10 saturation voltage (mv) 100 0.001 0.1 1 10 14989 g08 1 0.01 1000 t a = C55c t a = 25c t a = 125c load current (ma) 10 saturation voltage (mv) 100 0.001 0.1 1 10 14989 g09 1 0.01 1000 t a = C55c t a = 25c t a = 125c
lt1498/lt1499 14989fg 14 typical performance characteristics noise current spectrum gain and phase vs frequency cmrr vs frequency psrr vs frequency gain bandwidth and phase margin vs supply voltage channel separation vs frequency minimum supply voltage 0.1hz to 10hz output voltage noise noise voltage spectrum total supply voltage (v) 1 0 change in offset voltage (v) 50 100 150 200 23 4 5 14989 g10 250 300 t a = 85c t a = 25c t a = 70c nonfunctional t a = C55c time (1s/div) 010 output voltage (200nv/div) 14989 g11 v s = p 2.5v v cm = 0v frequency (hz) 1 80 noise voltage (nv/ ? hz ) 100 120 140 160 10 100 1000 14989 g12 60 40 20 0 180 200 v s = 5v, 0v v cm = 2.5v pnp active v cm = 4v npn active frequency (hz) 1 4 current noise (pa/ hz hz hh h p 1.5v v s = p 15v frequency (khz) 40 common mode rejection ratio (db) 60 80 70 100 120 30 50 90 110 1 100 1000 10000 14989 g15 20 10 v s = p 15v v s = p 2.5v frequency (khz) 10 power supply rejection ratio (db) 30 50 40 70 90 0 20 60 80 1 100 1000 10000 14989 g16 C10 10 v s = p 2.5v positive supply negative supply total supply voltage (v) 0 0 gain bandwidth (mhz) phase margin (deg) 4 6 8 10 12 14 5 10 15 20 14989 g17 25 16 18 20 2 0 20 30 40 50 60 70 80 90 100 10 30 phase margin gain bandwidth frequency (khz) 0.01 C110 channel separation (db) C100 C90 C80 C70 0.1 1 10 100 1000 14989 g18 C120 C130 C140 C150 C60 C50 v s = p 15v v out = p 1v p-p r l = 2k
lt1498/lt1499 14989fg 15 typical performance characteristics open-loop gain open-loop gain warm-up drift vs time total harmonic distortion + noise vs peak-to-peak voltage total harmonic distortion + noise vs frequency capacitive load handling slew rate vs supply voltage output step vs settling time to 0.01% capacitive load (pf) 20 overshoot (%) 50 70 40 10 1000 10000 100000 14989 g19 0 100 60 30 10 v s = 5v, 0v a v = 1 r l = 1k total supply voltage (v) 0 3 slew rate (v/s) 4 6 7 8 8 16 20 36 14989 g20 5 412 24 28 32 9 v out = 80% of v s a v = C1 rising edge falling edge settling time (s) 1.5 C10 output step (v) C8 C4 C2 0 10 4 2.0 2.5 14989 g21 C6 6 8 2 3.0 3.5 v s = p 15v noninverting inverting inverting noninverting output voltage (v) C20 C15 input voltage (v) 0 10 20 14989 g22 C10 C20 C10 C5 05 10 15 20 C5 5 C15 15 v s = p 15v r l = 2k r l = 10k output voltage (v) 0 input voltage (v) C1 0 1 3 5 14989 g23 C2 C3 C4 12 4 2 3 4 6 v s = 5v, 0v r l = 2k r l = 10k time after power-up (sec) 0 change in offset voltage (v) C10 0 10 60 100 160 14989 g24 C20 C30 C40 20 40 80 120 140 s8 package, v s = p 2.5v s8 package, v s = p 15v n8 package, v s = p 15v lt1499cs, v s = p 15v n8 package, v s = p 2.5v lt1499cs, v s = p 2.5v input voltage (v p-p ) 0.001 thd + noise (%) 0.01 0.1 1 0234 0.0001 1 5 14989 g25 f = 1khz r l = 10k a v = C1 v s = p 1.5v a v = 1 v s = p 1.5v a v = 1 v s = p 2.5v a v = C1 v s = p 2.5v frequency (khz) 0.01 thd + noise (%) 0.01 0.1 1 0.1 1 10 100 14989 g26 0.001 v s = p 1.5v v in = 2v p-p r l = 10k a v = 1 a v = C1
lt1498/lt1499 14989fg 16 typical performance characteristics 15v small-signal response 15v large-signal response 5v small-signal response 5v large-signal response 200ns/div 5mv/div 14989 g27 v s = 5v a v = 1 v in = 20mv p-p at 50khz r l = 1k 2s/div 1v/div 14989 g28 v s = 5v a v = 1 v in = 4v p-p at 10khz r l = 1k 200ns/div 5mv/div 14989 g29 v s = p 15v a v = 1 v in = 20mv p-p at 50khz r l = 1k 2s/div 5v/div 14989 g30 v s = p 15v a v = 1 v in = 20v p-p at 10khz r l = 1k
lt1498/lt1499 14989fg 17 applications information figure 1. lt1498 simpli? ed schematic diagram rail-to-rail input and output the lt1498/lt1499 are fully functional for an input and output signal range from the negative supply to the posi- tive supply. figure 1 shows a simpli? ed schematic of the ampli? er. the input stage consists of two differential am- pli? ers, a pnp stage (q1/q2) and an npn stage (q3/q4) which are active over different ranges of input common mode voltage. a complementary common emitter output stage (q14/q15) is employed allowing the output to swing from rail-to-rail. the devices are fabricated on linear technologys proprietary complementary bipolar process to ensure very similar dc and ac characteristics for the output devices (q14/q15). the pnp differential input pair is active for input com- mon mode voltages, v cm , between the negative supply to approximately 1.3v below the positive supply. as v cm moves further toward the positive supply, the transistor (q5) will steer the tail current, i 1 , to the current mirror (q6/q7) activating the npn differential pair, and the pnp differential pair becomes inactive for the rest of the input common mode range up to the positive supply. the output is con? gured with a pair of complementary common emitter stages that enables the output to swing from rail to rail. capacitors (c1 and c2) form local feedback loops that lower the output impedance at high frequencies. input offset voltage the offset voltage changes depending upon which input stage is active. the input offsets are random, but are trimmed to less than 475v. to maintain the precision characteristics of the ampli? er, the change of v os over the entire input common mode range (cmrr) is guaranteed to be less than 425v on a single 5v supply. input bias current the input bias current polarity also depends on the input common mode voltage, as described in the previous sec- tion. when the pnp differential pair is active, the input bias currents ? ow out of the input pins; they ? ow in opposite direction when the npn input stage is active. the offset error due to input bias current can be minimized by equalizing the noninverting and inverting input source impedances. this will reduce the error since the input offset currents are much less than the input bias currents. q4 q6 v bias d6 d5 +in d2 q3 q7 q1 i 1 q9 q2 d4 d1 d3 Cin out v C v + q5 q12 q10 q8 q14 14989 f01 c1 r1 r6 r3 v C c c r4 r5 c2 r2 q11 q13 q15 buffer and output bias r7
lt1498/lt1499 14989fg 18 applications information overdrive protection to prevent the output from reversing polarity when the input voltage exceeds the power supplies, two pair of crossing diodes d1 to d4 are employed. when the input voltage exceeds either power supply by approximately 700mv, d1/d2 or d3/d4 will turn on, forcing the output to the proper polarity. for the phase reversal protection to work properly, the input current must be less than 5ma. if the ampli? er is to be severely overdriven, an external resistor should be used to limit the overdrive current. furthermore, the lt1498/lt1499s input stages are pro- tected by a pair of back-to-back diodes, d5/d6. when a differential voltage of more than 0.7v is applied to the inputs, these diodes will turn on, preventing the zener breakdown of the input transistors. the current in d5/d6 should be limited to less than 10ma. internal resistors r6 and r7 (700 total) limit the input current for differential input signals of 7v or less. for larger input levels, a re- sistor in series with either or both inputs should be used to limit the current. worst-case differential input voltage usually occurs when the output is shorted to ground. in addition, the ampli? er is protected against esd strikes up to 3kv on all pins. figure 2b. lt1498 large-signal response figure 2a. lt1498 small-signal response c l = 10nf c l = 500pf c l = 0pf 14989 f02a v s = 5v a v = 1 c l = 10nf c l = 500pf c l = 0pf 14989 f02b v s = 5v a v = 1 capacitive load the lt1498/lt1499 are designed for ease of use. the ampli? er can drive a capacitive load of more than 10nf without oscillation at unity gain. when driving a heavy capacitive load, the bandwidth is reduced to maintain stability. figures 2a and 2b illustrate the stability of the device for small-signal and large-signal conditions with capacitive loads. both the small-signal and large-signal transient response with a 10nf capacitive load are well behaved. feedback components to minimize the loading effect of feedback, it is possible to use the high value feedback resistors to set the gain. however, care must be taken to insure that the pole formed by the feedback resistors and the total input capacitance at the inverting input does not degrade the stability of the ampli? er. for instance, the lt1498/lt1499 in a noninvert- ing gain of 2, set with two 30k resistors, will probably oscillate with 10pf total input capacitance (5pf input capacitance + 5pf board capacitance). the ampli? er has a 2.5mhz crossing frequency and a 60 phase margin at 6db of gain. the feedback resistors and the total input capacitance create a pole at 1.06mhz that induces 67 of phase shift at 2.5mhz! the solution is simple, either lower the value of the resistors or add a feedback capacitor of 10pf of more.
lt1498/lt1499 14989fg 19 1a voltage controlled current source 1a voltage controlled current sink C + 1/2 lt1498 1k 500pf t r < 1s 14989 ta03 si9430dy v in v + r l 100 0.5 1k i out = i out v + C v in 0.5 1k v in C + 1/2 lt1498 500pf 14989 ta04 si9410dy v + v + r l i out 100 0.5 1k i out = v in 0.5 t r < 1s input bias current cancellation typical applications C + C + 1m 1m cancellation amp signal amp 22pf input bias current less than 50na for 500mv v in (v + C 500mv) 1/2 lt1498 1/2 lt1498 r f v out 14989 ta05 v in r g
lt1498/lt1499 14989fg 20 package description n8 package 8-lead pdip (narrow .300 inch) (reference ltc dwg # 05-08-1510) n8 1002 .065 (1.651) typ .045 C .065 (1.143 C 1.651) .130 p .005 (3.302 p 0.127) .020 (0.508) min .018 p .003 (0.457 p 0.076) .120 (3.048) min 12 3 4 87 6 5 .255 p .015* (6.477 p 0.381) .400* (10.160) max .008 C .015 (0.203 C 0.381) .300 C .325 (7.620 C 8.255) .325 +.035 C.015 +0.889 C0.381 8.255 note: 1. dimensions are inches millimeters *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010 inch (0.254mm) .100 (2.54) bsc
lt1498/lt1499 14989fg 21 package description s8 package 8-lead plastic small outline (narrow .150 inch) (reference ltc dwg # 05-08-1610) .016 C .050 (0.406 C 1.270) .010 C .020 (0.254 C 0.508) s 45 o 0 o C 8 o typ .008 C .010 (0.203 C 0.254) so8 0303 .053 C .069 (1.346 C 1.752) .014 C .019 (0.355 C 0.483) typ .004 C .010 (0.101 C 0.254) .050 (1.270) bsc 1 2 3 4 .150 C .157 (3.810 C 3.988) note 3 8 7 6 5 .189 C .197 (4.801 C 5.004) note 3 .228 C .244 (5.791 C 6.197) .245 min .160 p .005 recommended solder pad layout .045 p .005 .050 bsc .030 p .005 typ inches (millimeters) note: 1. dimensions in 2. drawing not to scale 3. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm)
lt1498/lt1499 14989fg 22 package description s package 14-lead plastic small outline (narrow .150 inch) (reference ltc dwg # 05-08-1610) 1 n 2 3 4 .150 C .157 (3.810 C 3.988) note 3 14 13 .337 C .344 (8.560 C 8.738) note 3 .228 C .244 (5.791 C 6.197) 12 11 10 9 5 6 7 n/2 8 .016 C .050 (0.406 C 1.270) .010 C .020 (0.254 C 0.508) s 45 o 0 o C 8 o typ .008 C .010 (0.203 C 0.254) s14 0502 .053 C .069 (1.346 C 1.752) .014 C .019 (0.355 C 0.483) typ .004 C .010 (0.101 C 0.254) .050 (1.270) bsc .245 min n 1 2 3 n/2 .160 p .005 recommended solder pad layout .045 p .005 .050 bsc .030 p .005 typ inches (millimeters) note: 1. dimensions in 2. drawing not to scale 3. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm)
lt1498/lt1499 14989fg 23 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number e 10/09 edit in absolute maximum ratings 2 f 01/10 added lt1498h/lt1499h (h-grade) parts. re? ected throughout the data sheet. 2-24 g 03/10 updated part markings in order information section updated conditions for a vol in electrical characteristics section 2 6, 7 (revision history begins at rev e)
lt1498/lt1499 14989fg 24 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2009 lt 0410 rev g ? printed in usa related parts typical application bidirectional current sensor a bidirectional current sensor for battery-powered sys- tems is shown in figure 3. two outputs are provided: one proportional to charge current, the other proportional to discharge current. the circuit takes advantage of the lt1498s rail-to-rail input range and its output phase reversal protection. during the charge cycle, the op amp a1 forces a voltage equal to (i l )(r sense ) across r a . this voltage is then ampli? ed at the charge out by the ratio of r b over r a . in this mode, the output of a2 remains high, keeping q2 off and the discharge out low, even though the (+) input of a2 exceeds the positive power supply. during the discharge cycle, a2 and q2 are active and the operation is similar to the charge cycle. figure 3. bidirectional current sensor C + C + a1 1/2 lt1498 a2 1/2 lt1498 q2 mtp23p06 v o = i l = 1v/a for r a = 1k, r b = 10k r sense discharge out charge out q1 mtp23p06 r a r b r b r a r a r a v battery v battery 14989 f03 discharge i l charge r a r sense 0.1 r b () v o i l part number description comments lt c ? 1152 rail-to-rail input and output, zero-drift op amp high dc accuracy, 10v v os(max) , 100nv/c drift, 1mhz gbw, 1v/s slew rate, max supply current 2.2ma lt1211/lt1212 dual/quad 14mhz, 7v/s, single supply precision op amps input common mode includes ground, 275v v os(max) , 6v/c max drift, max supply current 1.8ma per op amp lt1213/lt1214 dual/quad 28mhz, 12v/s, single supply precision op amps input common mode includes ground, 275v v os(max) , 6v/c max drift, max supply current 3.5ma per op amp lt1215/lt1216 dual/quad 23mhz, 50v/s, single supply precision op amps input common mode includes ground, 450v v os(max) , max supply current 6.6ma per op amp lt1366/lt1367 dual/quad precision, rail-to-rail input and output op amps 475v v os(max) , 400khz gbw, 0.13v/s slew rate, max supply current 520a per op amp lt1490/lt1491 dual/quad micropower, rail-to-rail input and output op amps max supply current 50a per op amp, 200khz gbw, 0.07v/ s slew rate, operates with inputs 44v above v C independent of v + lt1884/lt1885 dual/quad, r ail-to-rail output picoamp input precision op amps i cc = 650a, v os < 50v, i b < 400pa

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Price & Availability of LT1498CN8PBF

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